Design and Optimization of High-Failure-Current Dual-Direction SCR for Industrial-Level ESD Protection

Abstract

In an industrial-grade bus, transient voltage suppressor (TVS) devices that need to withstand inrush currents ensure electrostatic discharge (ESD) reliability of the core chip. This article designs four types of dual-direction silicon-controlled rectifier (DDSCR) device structures based on the 0.5-μm CMOS process. The ESD performance of the TVS device is predicted and verified based on the basic principles of the device, two-dimensional device simulation, and transmission line pulse test results. Four DDSCR structures are embedded with floating N+ to adjust the device's holding voltage window. The results show that the current release capacity of DDSCR_1 is 81.93 mA/μm. The current release capability of DDSCR_2, which has a double-dummy-gate structure, is 82.37 mA/μm. The current release capability of DDSCR_3 of the gate-controlled structure is 86.68 mA/μm. The current release capability of DDSCR_4 of the double-dummy-gate structure and the gate-controlled structure is 86.25 mA/μm. Furthermore, the effect of the size of these devices on the ESD characteristics was studied. The on-resistance of the device structure is calculated by the curve-fitting method. The influence of the dummy gate structure and the gate-controlled structure on the ESD characteristics is analyzed. Finally, the optimal device size to meet the window is found.