An Efficient Method to Study the Tradeoff Between Power Amplifier Efficiency and Digital Predistortion Complexity

Abstract

This letter proposes a method to study the tradeoff between the power amplifier (PA) power efficiency and the corresponding digital predistortion (DPD) model complexity needed for its linearization. The linearization performance estimated with the adjacent channel power ratio (ACPR) is treated as a control variable. In order to study at different PA operating points (OPs), an algorithm is proposed to trace approximate Pareto fronts of the ACPR versus the DPD model number of coefficients. Crest factor reduction is applied when the backoff of the OP is less than the peak-to-average power ratio (PAPR) of the long-term evolution (LTE) signal. Experimental results on a PA with an LTE signal give interesting insights on the relationship between DPD complexity and PA power efficiency.