Analytical Estimation of LER-Like Variability in GAA Nano-Sheet Transistors

Abstract

FinFET and gate-all-around (GAA) devices such as Nanowire FET (NWFET) and Nano-sheet FET (NSFET) are prone to process induced variability. Line edge roughness (LER), Metal grain granularity (MGG) and Random dopant fluctuation (RDF) are conventional sources of variability. Due to the complex fabrication process of NSFET, a new source of variability has emerged, termed as sheet thickness variation (STV). The STV causes variation in quantum confinement (QC), hence results in performance variability. In this paper, we present an analytical model to estimate key performance parameters e.g. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sigma[V_{T}], \sigma[I_{on}], \sigma[SS]$</tex> etc., for FinFET and NWFET due to LER and for NSFET due to STV. The model, implemented on MATLAB, is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$300\times$</tex> efficient in comparison to TCAD. Such models, when incorporated in existing SPICE model files, will help in predicting the circuit and system level performance and impact of scaling.