Asymmetric Cascaded H-Bridge Multilevel Inverter With Single DC Source per Phase

Rajesh Vasu, Sumit K. Chattopadhyay, Chandan Chakraborty

IEEE Transactions on Industrial Electronics · 2019 · 60 citations · 24 references

Concepts

Abstract

This article proposes a self-balanced cascaded H-bridge multilevel inverter with a binary asymmetric ratio. The inverter uses only one dc source per phase that will feed the H-bridge with the highest dc-link voltage (called main bridge). The dc links of all other H-bridges (called auxiliary bridges) are formed by floating capacitors. Floating capacitors converge to the corresponding steady-state voltages by the principle of a level-doubling network without using any closed-loop control technique. In a steady state, the dc-link voltage of each auxiliary bridge will be equal to half of the dc-link voltage of its preceding H-bridge. This will result in an inherent binary asymmetric ratio among all the dc-link voltages. Operation of the proposed topology is validated by MATLAB simulations and experimentation on the hardware prototype. Experimental results match well with simulation results.

References

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