A Unified Capacitive-Coupled Memristive Model for the Nonpinched Current–Voltage Hysteresis Loop

Abstract

The concept of the memristor, a resistor with memory, was proposed by Chua in 1971 as the fourth basic element of electric circuitry. Despite a significant amount of effort devoted to the understanding of memristor theory, our understanding of the nonpinched current-voltage (<i>I</i>-<i>V</i>) hysteresis loop in memristors remains incomplete. Here we propose a physical model of a memristor, with a capacitor connected in parallel, which explains how the nonpinched <i>I</i>-<i>V</i> hysteresis behavior originates from the capacitive-coupled memristive effect. Our model replicates eight types of characteristic nonlinear <i>I</i>-<i>V</i> behavior, which explains all observed nonpinched <i>I</i>-<i>V</i> curves seen in experiments. Furthermore, a reversible transition from a nonpinched <i>I</i>-<i>V</i> hysteresis loop to an ideal pinched <i>I</i>-<i>V</i> hysteresis loop is found, which explains the experimental data obtained in C₁₅H₁₁O₆-based devices when subjected to an external stimulus (e.g., voltage, moisture, or temperature). Our results provide the vital physics models and materials insights for elucidating the origins of nonpinched <i>I</i>-<i>V</i> hysteresis loops ascribed to capacitive-coupled memristive behavior.