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Common-Mode Voltage Elimination for Dual Two-Level Inverter-Fed Asymmetrical Six-Phase PMSM
89
Citations
45
References
2019
Year
Electrical EngineeringElectric MachineEngineeringVoltage-source InverterMotor DriveElectrical DrivePower Electronics ConverterTotal CmvPwm SignalsCommon-mode Voltage EliminationPower InverterPower Electronics
The voltage-source inverter with pulsewidth modulation (PWM) is widely used in motor drive applications owing to the technical maturity and simplicity. However, the inverter operating in the discrete and impulse state generates the high-frequency common-mode voltage (CMV) in the neutral point terminal of stator winding, which induces the negative effects. This article proposes a CMV elimination modulation scheme for the dual two-level inverter-fed asymmetrical six-phase permanent magnet synchronous motor, which has two sets of three-phase windings spatially shifted by 30° electrical degrees. The modulation algorithm shifts the PWM signals with the designed end-to-end cyclic sequence, which can retain the zero-voltage vectors for each sub-CMV of dual three-phase windings and theoretically eliminate the total CMV for the motor drive system. The validation of the proposal is verified by simulations and experiments.
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