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Performance Analysis of FinFET device Using Qualitative Approach for Low-Power applications
34
Citations
20
References
2019
Year
Finfet DeviceEngineeringPower ElectronicsSemiconductor DeviceNanoelectronicsElectronic EngineeringPower-aware DesignPower Electronic DevicesDevice ModelingElectrical EngineeringNanotechnologyLow VoltageFinfet StructureComputer EngineeringMicroelectronicsLow-power ElectronicsPerformance AnalysisLow-power ApplicationsApplied PhysicsElectrical Insulation
The introduction of Field Effect Transistor (FinFET) Technology played a leading contender in today microelectronics. FinFET structure allows to scale the device at sub-nanometer. Short channel effects can be suppressed by formation of ultra-thin fin in FinFET device. In this paper we compared the performance of the 20nm FinFET device by using different dielectric materials. We have considered only n-channel FinFET device. Simulation carried on the electron mobility, potential distribution, energy band of hole and electron, on-off current ratio (Ion/Ioff) and power dissipation of device with respect to the applied gate voltage. Mobility enhancement and higher current ratio (Ion/Ioff) is observed in proposed FinFET device having high k-dielectric material at lower voltage. This designed can be useful for low power applications due to low power dissipation. In high k-dielectric material, 1.41% improvement is observed in potential voltage with respect to low k- dielectric material when Vgs at low voltage and 0.98% improvement is observed when Vgs at high voltage. In high k- dielectric material 15% hike is observed in the energy conduction band as compared to low k-dielectric material when Vgs at low voltage and 14% hike is observed when vgs at high voltage.
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