Novel Tunnel‐Contact‐Controlled IGZO Thin‐Film Transistors with High Tolerance to Geometrical Variability

Abstract

Thin insulating layers are used to modulate a depletion region at the source of a thin-film transistor. Bottom contact, staggered-electrode indium gallium zinc oxide transistors with a 3 nm Al₂ O₃ layer between the semiconductor and Ni source/drain contacts, show behaviors typical of source-gated transistors (SGTs): low saturation voltage (V_{D_SAT} ≈ 3 V), change in V_{D_SAT} with a gate voltage of only 0.12 V V^-1 , and flat saturated output characteristics (small dependence of drain current on drain voltage). The transistors show high tolerance to geometry: the saturated current changes only 0.15× for 2-50 µm channels and 2× for 9-45 µm source-gate overlaps. A higher than expected (5×) increase in drain current for a 30 K change in temperature, similar to Schottky-contact SGTs, underlines a more complex device operation than previously theorized. Optimization for increasing intrinsic gain and reducing temperature effects is discussed. These devices complete the portfolio of contact-controlled transistors, comprising devices with Schottky contacts, bulk barrier, or heterojunctions, and now, tunneling insulating layers. The findings should also apply to nanowire transistors, leading to new low-power, robust design approaches as large-scale fabrication techniques with sub-nanometer control mature.