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Sensitivity based Error Resilient Techniques for Energy Efficient Deep Neural Network Accelerators
38
Citations
12
References
2019
Year
Unknown Venue
EngineeringMachine LearningHardware AlgorithmComputer ArchitectureAggressive Voltage ScalingError ResilienceHardware SecuritySparse Neural NetworkEmbedded Machine LearningParallel ComputingError Resilient TechniquesElectrical EngineeringComputer EngineeringWeight SensitivityComputer ScienceDeep LearningNeural Architecture SearchHardware AccelerationVlsi ArchitectureDomain-specific Accelerator
With inherent algorithmic error resilience of deep neural networks (DNNs), supply voltage scaling could be a promising technique for energy efficient DNN accelerator design. In this paper, we propose novel error resilient techniques to enable aggressive voltage scaling by exploiting different amount of error resilience (sensitivity) with respect to DNN layers, filters, and channels. First, to rapidly evaluate filter/channel-level weight sensitivities of large scale DNNs, first-order Taylor expansion is used, which accurately approximates weight sensitivity from actual error injection simulation. With measured timing error probability of each multiply-accumulate (MAC) units considering process variations, the sensitivity variation among filter weights can be leveraged to design DNN accelerator, such that the computations with more sensitive weights are assigned to more robust MAC units, while those with less sensitive weights are assigned to less robust MAC units. Based on post-synthesis timing simulations, 51% energy savings has been achieved with CIFAR-10 dataset using VGG-9 compared to state-of-the-art timing error recovery technique with the same constraint of 3% accuracy loss.
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