Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing

TLDR

Neuromorphic computers promise to surpass conventional computing efficiency by parallel programming and readout of neural network weights in crossbar memory arrays, but require selective, linear weight updates and sub‑10‑nA read currents. The study introduces an ionic floating‑gate memory array comprising a polymer redox transistor linked to a conductive‑bridge memory. The array achieves selective, linear programming in parallel by surpassing the CBM bridging threshold voltage, and attains sub‑10‑nA read currents by diluting the conductive polymer with an insulator to reduce conductance. Redox transistors in the array withstand over one billion write‑read cycles while enabling write‑read frequencies above one megahertz.

Abstract

Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies.