Relaxation digital‐to‐analogue converter

Abstract

The novel relaxation digital‐to‐analogue conversion technique, which takes advantage of the exponential impulse response of a first‐order RC network to generate binary‐weighted voltages, is proposed to design standard‐cell based, mismatch‐insensitive, ultra‐low power, tiny digital‐to‐analogue converters targeting the requirements of Internet of Things applications. The effectiveness of the approach is validated by simulations and measurements performed on a proof‐of‐concept 10 bit, 300 S/s field programmable gate array prototype.