Indirect Input-Series Output-Parallel DC–DC Full Bridge Converter System Based on Asymmetric Pulsewidth Modulation Control Strategy

Abstract

This paper proposes an indirect input-series output-parallel (I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP) dc-dc full-bridge converter system based on asymmetric pulsewidth modulation (APWM) control strategy for high input voltage applications. When a short-circuit fault occurs in a high input voltage dc bus, the proposed I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP system can disconnect from the dc bus effectively and avoid the input filter capacitors of constituent modules discharge compared with the traditional ISOP system, facilitating fault handling and protecting the input filter capacitors. Moreover, with the proposed I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP structure, it is easy to achieve redundancy design when one or a few constituent modules fail. The APWM control strategy is introduced to the I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP system rather than the classical phase-shifted control strategy for the basic full-bridge module to reduce the voltage stress of power switch and the filter requirement. The characteristics of input voltage sharing and output current sharing of the I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP system are also analyzed. A three-module I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SOP system prototype was built, and the experimental results verify the correctness and effectiveness of the proposed solution.