Design of Convolutional Neural Network Based on FPGA

Abstract

Recently, FPGAs have been widely used in the implementation of hardware accelerators for CNN, especially on mobile and embedded devices. This paper proposes an FPGA-based CNN accelerator. The highly reusable accelerator function is designed to construct the optimized convolutional neural network and memory optimization with a lower hardware resource consumption. The results show the advantage of performance and power when compared with Core i5 CPU and GTX 960 GPU.