Concepedia

A Survey on Security Threats and Countermeasures in IEEE Test Standards

Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre

IEEE Design and Test · 2019 · 31 citations · 39 references

Open access

Abstract

Editor's note: Test infrastructure has been shown to be a portal for hackers. This article reviews the threats and countermeasures for IEEE test infrastructure standards.

References

39

A distributed BIST control scheme for complex VLSI devices

Y. Zorian · 2002 · 539 citations

Bist Scheme, Engineering, Vlsi Design +21

Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard

Bo Yang, Kaijie Wu, Ramesh Karri · 2005 · 341 citations

Engineering, Information Security, Information Forensics +17

Secure Scan: A Design-for-Test Architecture for Crypto Chips

Bo Yang, Kaijie Wu, Ramesh Karri · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006 · 235 citations

Hardware Trojan, Engineering, Information Security +16

Attacks and Defenses for JTAG

Kurt Rosenfeld, Ramesh Karri · IEEE Design & Test of Computers · 2010 · 141 citations

Engineering, Information Security, Verification +19

Forensic imaging of embedded systems using JTAG (boundary-scan)

Ing. M.F. Breeuwsma · Digital Investigation · 2006 · 92 citations

Hardware Security, Forensic Search, Engineering +7

A Survey on Security Threats and Countermeasures in IEEE Test Standards

Concepts

Abstract

References