Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers

TLDR

Quantum computing has become feasible thanks to advances in engineering and algorithms, yet current compilers translate 1‑ and 2‑qubit logical gates into control pulses, leading to inefficient, high‑latency programs due to a mismatch between logical ISA and physical implementation. The authors propose a universal quantum compilation method that aggregates multiple logical operations into up to 10‑qubit units to reduce inefficiency. The method optimizes 10‑qubit aggregates by identifying commutative intermediate operations for efficient scheduling and generating custom control pulses, and is evaluated on near‑term quantum applications simulated on superconducting architectures. Compared to standard gate‑based compilation, the approach achieves a mean 5× speedup (up to 10×), deepens vertical integration between software and hardware, and could accelerate the feasibility of quantum computation by reducing latency.

Abstract

Recent developments in engineering and algorithms have made real-world applications in quantum computing possible in the near future. Existing quantum programming languages and compilers use a quantum assembly language composed of 1- and 2-qubit (quantum bit) gates. Quantum compiler frameworks translate this quantum assembly to electric signals (called control pulses) that implement the specified computation on specific physical devices. However, there is a mismatch between the operations defined by the 1- and 2-qubit logical ISA and their underlying physical implementation, so the current practice of directly translating logical instructions into control pulses results in inefficient, high-latency programs. To address this inefficiency, we propose a universal quantum compilation methodology that aggregates multiple logical operations into larger units that manipulate up to 10 qubits at a time. Our methodology then optimizes these aggregates by (1) finding commutative intermediate operations that result in more efficient schedules and (2) creating custom control pulses optimized for the aggregate (instead of individual 1- and 2-qubit operations). Compared to the standard gate-based compilation, the proposed approach realizes a deeper vertical integration of high-level quantum software and low-level, physical quantum hardware. We evaluate our approach on important near-term quantum applications on simulations of superconducting quantum architectures. Our proposed approach provides a mean speedup of $5\times$, with a maximum of $10\times$. Because latency directly affects the feasibility of quantum computation, our results not only improve performance but also have the potential to enable quantum computation sooner than otherwise possible.