High data rate and flexible hardware QC-LDPC decoder for satellite optical communications

Abstract

Satellite optical communications are trendy for future satellite wireless communications and introduce new challenges concerning throughput and error correction for the channel decoder. This paper details a custom solution based on LDPC code and architecture co-design. This solution was designed to deliver an efficient trade-off in terms of decoder throughput and error correction performance. A flexible architecture that implements an Offset Min-Sum algorithm on Field-Programmable Gate Array (FPGA) is proposed. A resulting system composed of 5 elementary LDPC decoders that fit in a single Zynq Ultrascale+ FPGA device reaches more than 10 Gbps with error correction performance similar or better than present current satellite communication standards.