A 0.8-V 82.9-$\mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

Abstract

In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip is fabricated using 65-nm CMOS and contains three key features: 1) current reusing low-noise amplifier (CRLNA) for low power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise measurement even on 350-mV electrode dc offset (EDO); and 3) dual-mode programmable gain amplifier (DMPGA) that reduces TRX power consumption by activating only when the intentional blink is present. EEG instrumentation amplifier (IA) shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire integrated circuit (IC) consumes 82.9 μW . From the measurement, with nine subjects, the proposed BCI system accomplished 84% average accuracy for the binary selection task.