Publication | Closed Access
R-Cache: A Highly Set-Associative In-Package Cache Using Memristive Arrays
11
Citations
27
References
2018
Year
Unknown Venue
Hardware SecurityElectrical EngineeringThree-dimensional DieEngineeringDie StackingComputer EngineeringComputer ArchitectureIn-package CachesMemory DeviceComputer ScienceParallel ComputingMicroelectronicsMemory Architecture
Over the past decade, three-dimensional die stacking technology has been considered for building large-scale in-package memory systems. In particular, in-package DRAM cache has been considered as a promising solution for high band-width and large-scale cache architectures. There are, however, significant challenges such as limited energy efficiency, costly tag management, and physical limitations for scalability that need to be effectively addressed before one can adopt in-package caches in the real-world applications. This paper proposes R-Cache, an in-package cache made by 3D die stacking of memristive memory arrays to alleviate the above mentioned challenges. Our simulation results on a set of memory intensive parallel applications indicate that R-Cache outperforms the state-of-the-art proposals for in-package caches. R-Cache improves performance by 38% and 27% over the state-of-the-art direct mapped and set associative cache architectures, respectively. Moreover, R-Cache results in averages of 40% and 27% energy reductions as compared to the direct mapped and set-associative cache systems.
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