Fundamental Switching Frequency Optimal Pulsewidth Modulation of Medium-Voltage Cascaded Seven-Level Inverter

Abstract

Multilevel converters (MLCs) emerged as standard solutions for medium voltage (MV) high-power industrial ac drives. MV drives require low device switching frequency operation due to the higher switching losses of semiconductor devices. However, low device switching frequency operation leads to an increase in the harmonic distortion of machine stator currents. Therefore, there is a need to implement low switching frequency modulation technique for MLCs, which does not compromise on the harmonic distortion of machine currents. The goal of this paper is to propose a new optimal pulsewidth modulation technique for a cascaded seven level (7L) inverter such that the maximum device switching frequency is limited to the rated fundamental frequency (50/60 Hz) and all power semiconductor devices operate at identical switching frequency. Optimal switching patterns were determined offline assuming steady-state conditions. Later, switching angles for each semiconductor device are determined and stored in an FPGA controller. A low-power prototype of the 7L cascade inverter has been developed to demonstrate the proposed modulation technique. The experimental results demonstrated that the proposed optimal modulation technique maintains the quality of machine stator currents while the device switching frequency is limited to the rated fundamental frequency.