InGaAs-on-Insulator MOSFETs Featuring Scaled Logic Devices and Record RF Performance

Abstract

We demonstrate scaled InGaAs-on-insulator FinFETs and planar MOSFETs on Si substrate for low power logic and RF applications. This Si-CMOS compatible technology implements SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> source-drain spacers and doped extensions for reduced overlap capacitances. FinFETs with performance for logic applications matching state-of-the-art are demonstrated. Simultaneously, f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 400 and 100 GHz are achieved respectively, the highest reported f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> for a III-V MOSFET on Si. Finally, we explore the use of an extended gate line to reduce gate resistance, offering balanced f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 215/300 GHz, the first report of III-V RF devices on Si matching state of the art Si-CMOS.