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A 16-bit 12-GS/s Single-/Dual-Rate DAC With a Successive Bandpass Delta-Sigma Modulator Achieving <−67-dBc IM3 Within DC to 6-GHz Tunable Passbands
37
Citations
15
References
2018
Year
Dac LinearityEngineeringData ConverterMixed-signal Integrated CircuitAnalog DesignComputer Engineering6-Ghz Tunable PassbandsDigital ArchitectureDigital Circuit DesignHigh LinearitySignal ProcessingAnalog-to-digital Converter
This paper presents a hybrid digital-to-analog converter (DAC) architecture with a tunable bandpass delta-sigma modulator (DSM) to synthesize channelized signals over a wide frequency range with high linearity and a low in-band noise floor. Due to the mostly digital architecture, this DAC topology favors technology scaling. The DSM uses a successive pipeline structure with time-interleaving techniques to achieve a 12-GS/s data rate and overall 16-bit DAC resolution. To improve the linearity at high frequencies, an inverse-sinc-shaped digital pre-distortion (DPD) scheme is used to better approximate and compensate the timing errors. The DAC can be configured for single- or dual-rate operation modes to tradeoff different input data rates with DAC linearity and spectral images. The prototype was fabricated in 65-nm CMOS technology with an analog area of 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and <;250-mW analog power consumption. It achieved IM3 of -85 to -67 dBc over the Nyquist band, and the spurious-free dynamic range remains >60 dBc up to a 4.2-GHz signal frequency at 12 GS/s in the single-rate mode thanks to the hybrid structure and proposed DPD techniques.
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