Publication | Open Access
Micro-Energy Harvesting System Including a PMU and a Solar Cell on the Same Substrate With Cold Startup From 2.38 nW and Input Power Range up to 10 $\mu$W Using Continuous MPPT
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Citations
30
References
2018
Year
EngineeringEnergy EfficiencyEnergy ConversionMicro-energy Harvesting SystemPhotovoltaic SystemPower ElectronicsPhotovoltaicsPower Management UnitRenewable Energy SystemsSolar Thermal EnergySolar Energy UtilisationAuxiliary Charge PumpElectrical EngineeringEnergy HarvestingSolar PowerComputer EngineeringCold StartupEnergy ManagementDickson Charge Pump
This paper presents a power management unit (PMU) powered by a 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> solar cell on the same substrate to rise up the harvested voltage above 1.1 V. The on-chip solar cell and the PMU are fabricated in standard 0.18 μm CMOS technology achieving a form factor of 1.575 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The PMU is able to startup from a harvested power of 2.38 nW without any external kick off or control signal. The PMU features a continuous and two-dimensional maximum power point tracking (MPPT) working in open-loop mode to handle a harvested power range from nW to μW, by modifying both the charge pump topology and the switching frequency. The MPPT is based on four voltage level detectors that define five working regions depending on the illumination and on a self-tuning reference current for a fine adjustment of the switching frequency. The chip also includes an auxiliary charge pump to generate the voltage level necessary for the control circuit, implemented as a Pelliconi charge pump of eight stages with NMOS transistors in P-well as diodes. A Dickson charge pump with transmission gates as switches and with variable gain and capacitance per stage is also designed as the main charge pump. Finally, two relaxation oscillators are implemented to drive both charge pumps. This paper is accompanied by a video file demonstrating the PMU operation by powering an off-chip NOR gate.
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