Safety Verification Using Barrier Certificates with Application to Double Integrator with Input Saturation and Zero-Order Hold

Abstract

It is desirable to increase the control sample period in cyber-physical systems such that the available processing power and data transfer are minimized. In this paper, a safety verification technique is proposed which allows a trade-off between the size of the sample period and the convergence rate. The proposed technique is applied to a double integrator with input saturation and zero-order hold. An expression for the control law and an explicit relationship between sample period and control parameters are presented. It is shown that the proposed control law drives all state trajectories initiated in the safe set to the origin without violating safety criteria as long as the sample period remains sufficiently small. Moreover, if the control signal is bounded between the proposed limits, it is shown analytically that a pilot-based configuration also remains in the safe set. The effectiveness of the proposed technique is verified using numerical simulations.