Influence of the sampling clock pulse shape mismatch on channel-interleaved photonic analog-to-digital conversion

Abstract

We investigate the pulse shape mismatch of the sampling clock in channel-interleaved photonic analog-to-digital converters (PADCs) and its influence on the frequency response of the PADC system. Two schemes to generate sampling clock pulses are experimentally implemented to study the influence of the pulse shape mismatch. The scheme with the well-managed pulse shape in all channels is successful in eliminating the influence. Subsequently, a flat 35 GHz frequency response of a four-channel 40 GSa/s PADC is demonstrated, and the effective number of bits reaches 7.7 bits at 11 GHz and 7 bits at 31 GHz.