Publication | Open Access
Low Noise and High Photodetection Probability SPAD in 180 nm Standard CMOS Technology
14
Citations
19
References
2018
Year
Unknown Venue
PhotonicsElectrical EngineeringStandard Cmos 180EngineeringImage SensorPhysicsBias Temperature InstabilityApplied PhysicsNoiseLow NoisePhotoelectric MeasurementIntegrated CircuitsPhotonic Integrated CircuitMicroelectronicsPhotonic DeviceOptoelectronicsCircuit IntegrationOptical Amplifier
A square shaped, low noise and high photo-response single photon avalanche diode suitable for circuit integration, implemented in a standard CMOS 180 nm high voltage technology, is presented. In this work, a p+ to shallow n-well junction was engineered with a very smooth electric field profile guard ring to attain a photo detection probability peak higher than 50% with a median dark count rate lower than 2 Hz/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> when operated at an excess bias of 4 V. The reported timing jitter full width at half maximum is below 300 ps for 640 nm laser pulses.
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