Modeling and Design Optimization of Capacitor Current Ramp Compensated Constant On-Time <inline-formula> <tex-math notation="LaTeX">$V^{2}$</tex-math> </inline-formula> Control

Abstract

Constant on-time V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control for point-of-load buck converters has instability issues in the cases that the output capacitors' RC time constants are small. This paper intensively studies the proposed solution using capacitor current ramp compensation, which is a superior solution featuring fast response and universality. A frequency-domain small-signal model based on describing function method is proposed in this paper. The time-domain large-signal response to the load step change is analyzed. The analysis illustrates the unique transient response behaviors of the capacitor current ramp compensated V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control. The design optimization methodology based on frequency-domain and time-domain analysis is presented. The proposed model and the design guidelines are verified by the experimental results.