2017 · 27 citations · 31 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsHardware-software Co-designAccelerator ArchitectureHardware AccelerationInterprocess CommunicationLatency OptimizationReal-time Systems ArchitectureTiming AnalysisAccelerator MicroarchitectureAcceleratorsControl-software Co-designEmbedded Processor DesignEmbedded Software Co-designLow-latency DesignModular DesignPipelining
Tick is a new SDR system that provides programmability and ensures low latency at both PHY and MAC. It supports modular design and element-based programming, similar to the Click router framework [23]. It uses an accelerator-rich architecture, where an embedded processor executes control flows and handles various MAC events. User-defined accelerators offload those tasks, which are either computation-intensive or communication-heavy, or require fine-grained timing control, from the processor, and accelerate them in hardware. Tick applies a number of hardware and software co-design techniques to ensure low latency, including multi-clock-domain pipelining, field-based processing pipeline, separation of data and control flows, etc. We have implemented Tick and validated its effectiveness through extensive evaluations as well as two prototypes of 802.11ac SISO/MIMO and 802.11a/g full-duplex.
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