IEEE Transactions on Circuits and Systems I Regular Papers · 2017 · 52 citations · 32 references
EngineeringComputer EngineeringElectrical EngineeringFault-tolerant ComputingHardware SecurityMicroelectronicsChaos TheoryClock ManagementCmos Circuit DesignRandom Number GenerationChaotic OscillatorsContinuous Random VariablesFlip-flop DesignHardware Random Number GeneratorsHardware ResourcesRandom Bit GenerationRandomness TestsTrue Random Number Generation
This paper introduces a new concept of a true random number generator (TRNG) based on two stages of randomness. The first stage is based on a novel chaotic circuit, which utilizes time as a continuous random variable in a feedback loop. The second stage is based on metastability; however, in contrast to known digital solutions, a flip-flop is stimulated by chaotic initial conditions. The advantage of chaotic behavior is the circuit's immunity to active injection side-channel attacks (e.g., a frequency attack). The circuit design parameters can also vary in a wide range, which makes the TRNG insensitive to process, voltage and temperature (PVT) conditions and tolerance. Moreover, the design is extremely simplified, and therefore, feasible to implement in simple and inexpensive reprogrammable devices (no digital clock manager, programmable delay line, or phase locked loop are required). The TRNG ensures a constant (synchronous) 1-Mb/s bit rate output without additional post-processing. The randomness tests prove a high quality of an output bit stream, which is relatively high when compared with other solutions based on similar hardware resources.
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Oscillator phase noise: a tutorial
T.H. Lee, Ali Hajimiri · IEEE Journal of Solid-State Circuits · 2000 · 910 citations
Fabio Pareschi, Riccardo Rovatti, Gianluca Setti · IEEE Transactions on Information Forensics and Security · 2012 · 180 citations · Full text