Integrated silicon qubit platform with single-spin addressability, exchange control and single-shot singlet-triplet readout

TLDR

Silicon quantum‑dot spin qubits, compatible with CMOS and offering long coherence times, promise scalable quantum processors, yet existing devices have not simultaneously enabled single‑spin electron‑spin‑resonance control and voltage‑pulse singlet‑triplet readout needed for parallel operation and error detection. We present an integrated silicon MOS double‑quantum‑dot device that achieves single‑spin addressing through electron‑spin resonance while delivering high‑fidelity singlet‑triplet readout, demonstrating simultaneous control and measurement on the same platform.

Abstract

Silicon quantum dot spin qubits provide a promising platform for large-scale quantum computation because of their compatibility with conventional CMOS manufacturing and the long coherence times accessible using $^{28}$Si enriched material. A scalable error-corrected quantum processor, however, will require control of many qubits in parallel, while performing error detection across the constituent qubits. Spin resonance techniques are a convenient path to parallel two-axis control, while Pauli spin blockade can be used to realize local parity measurements for error detection. Despite this, silicon qubit implementations have so far focused on either single-spin resonance control, or control and measurement via voltage-pulse detuning in the two-spin singlet-triplet basis, but not both simultaneously. Here, we demonstrate an integrated device platform incorporating a silicon metal-oxide-semiconductor double quantum dot that is capable of single-spin addressing and control via electron spin resonance, combined with high-fidelity spin readout in the singlet-triplet basis.