2017 · 116 citations · 0 references
EngineeringBioengineeringBiomedical EngineeringElectrophysiologyNeural EngineeringNeurophysiologyImplantable Neural DevicesNeural InterfacesNeural Recording TechnologiesNeural Signal AcquisitionNeural StimulationNeurostimulationImplantable Neural InterfacesImplantable Neural StimulationMultichannel Neural RecordingNeural RecordingNeural Recording SystemsNeural Signal RecordingNeural Stimulation DevicesStimulation Artifact Suppression
We present an 180nm HV CMOS IC for concurrent neural stimulation and recording that combines 64 low-noise recording front-ends and 4 independent stimulators multiplexed to any of the 64 channels. The stimulators have 5mA peak current, 12V compliance and dynamic power management to maximize efficiency. Co-design of the stimulation and recording subsystems resulted in 100mV of recording linear range, 70nV/rtHz noise, and a rapid 1ms (single-sample) artifact recovery during stimulation.