Publication | Closed Access
Back Enhanced (BE) SOI MOSFET under non-conventional bias conditions
21
Citations
3
References
2017
Year
Unknown Venue
Semiconductor TechnologyElectrical EngineeringEngineeringNanoelectronicsElectronic EngineeringSoi MosfetApplied PhysicsNon-conventional Bias ConditionsBias Temperature InstabilityNew Back EnhancedPower ElectronicsMicroelectronicsBeyond CmosSemiconductor Device
The aim of this work is to investigate the working principle of the new Back Enhanced (BE) SOI MOSFET, under non-conventional bias conditions. This planar BE SOI device with undoped source/drain/channel structure presents the advantage to have very simple fabrication process (without any implantation and electron beam lithography) and can act like a p- or n-type MOS, depending on the back-gate bias condition. Under non-conventional bias condition, many electrical parameters present different behavior. The threshold voltage increases linearly with the drain to source voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) if V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> > 0 and it is constant if V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> <;0 in case of p-type BE SOI MOSFET and, analogously, the threshold voltage increases linearly with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> if it is negative and it is constant if V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> >0 in case of a n-type BE SOI MOSFET. This fact is explained through experimental and simulated data.
| Year | Citations | |
|---|---|---|
Page 1
Page 1