Compact 35–70 GHz SPDT Switch With High Isolation for High Power Application

Abstract

This letter proposes a broadband high isolation and high power compact single pole double throw (SPDT) switch. In contrast to the traditional structure of grounded source pad, the source pad of the shunt-stacked FET is absorbed into the transmission line, and the drain of the shuntstacked FET is grounded to a via-hole. This structure helps to extend the operation bandwidth and reduce the chip size. The proposed SPDT switch is composed of six shunt-stacked FET units on each branch with this novel structure. Stacked FETs technique increases the voltage handling by placing two FETs in series. It has been fabricated using a commercial 0.1 μm GaAs pseudomorphic high-electron-mobility transistor (PHEMT) process. The chip size is 1.2×0.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The switch operates at the frequency range of 35-70 GHz with less than 3 dB insertion loss and more than 40-dB isolation. The switch demonstrates a 1 dB insertion loss compression with a 20.2 dBm input power at 31 GHz. The isolation is larger than 30 dB from 10 to 95 GHz. To the best of the authors' knowledge, this broadband isolation performance is among the best of the reported SPDT switches.