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Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy

Chip Multiprocessors3D Ic ArchitectureManycore ProcessorEngineeringEnergy EfficiencyOptimization-based PowerHigh-performance ArchitectureMany-core ArchitectureComputer ArchitectureComputer EngineeringSystems EngineeringParallel ComputingMicroelectronicsHeterogeneous Cache Hierarchy