Gain‐boosted dynamic amplifier for pipelined‐SAR ADCs

Abstract

A high‐gain and high‐speed gain‐boosted dynamic amplifier for pipelined‐successive approximation register ADCs is presented. A cross‐coupling cascode topology is proposed to boost the gain of a single‐stage dynamic amplifier. The proposed dynamic amplifier achieves a voltage gain of 32 under a 1.2 V power supply in 130 nm CMOS technology. Sampling at 150 MS/s, the proposed dynamic amplifier consumes a total power of 0.22 mW.