Small-signal modeling of PWM dual-SEPIC dc-dc converter by circuit averaging technique

Abstract

This paper presents the small-signal modeling of a dual-SEPIC dc-dc converter power stage operating in continuous-conduction mode using the circuit averaging technique. The converter component parasitic resistances are taken into account. From the small-signal model, the following expressions of the converter required to design the outer voltage loop are derived: duty cycle-to-output voltage and input-to-output voltage transfer functions, input impedance, and output impedance. A design example is given and the characteristics of these transfer functions are analyzed. Simulations are performed to verify the correctness of the theoretically obtained transfer functions. The dual-SEPIC converter has four reactive components and yields transfer functions of order two. A brief discussion on this aspect is also provided.