A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication

Abstract

A 2 GHz direct digital frequency synthesizer (DDFS) chip-set is presented which operates at a very low supply voltage of 2 V. The chip-set consists of a CMOS DDFS LSI which synthesizes a sine wave at 55 Msps with an internal 10 b digital-to-analog converter (DAC) and Si bipolar image-reject up-converters. To achieve both high purity and low power dissipation, we developed a distortion-free up-conversion architecture and an efficient ROM output bit-width reduction technique. Operation of 2 V for the entire chip-set becomes possible because of the use of both multithreshold-voltage CMOS in the D/A converters and current-folded double-balanced mixers in the microwave up-converters. The synthesizer achieves a wide spurious-free dynamic range of 50 dB and a low power dissipation of less than 160 mW at 2 GHz.