Sub‐50 nm Channel Vertical Field‐Effect Transistors using Conventional Ink‐Jet Printing

Abstract

A printed vertical field-effect transistor is demonstrated, which decouples critical device dimensions from printing resolution. A printed mesoporous semiconductor layer, sandwiched between vertically stacked drive electrodes, provides <50 nm channel lengths. A polymer-electrolyte-based gate insulator infiltrates the percolating pores of the mesoporous channel to accumulate charge carriers at every semiconductor domain, thereby, resulting in an unprecedented current density of MA cm^-2 .