A high CMRR analog front-end IC for wearable physiological monitoring

Abstract

This paper presents a High Common Mode Rejection Ratio(CMRR) Instrumentation Amplifier(IA) with Driven Right Leg(DRL) circuitry for Electrocardiogram(ECG) signal acquisition. The circuit is based on the current feedback topology. The high pass and lowpass filters are integrated into the IA. DRL is implemented to minimise the common mode noise. The present design is fabricated at UMC on 0.18µm CMOS process technology. The measured CMRR of the circuit is 122dB. The bandwidth of the amplifier is 0.05–125Hz. The integrated input referred noise is 2.3µV. the ICMR is 0–1.65V and the dynamic range is +4.5mV. The power of the total circuit(IA+DRL) is 132µW with a 3.3V supply. The instrumentation amplifier is tested with simulators and patients also.