2016 · 19 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysSystem-on-chip DesignDigital Image ProcessingField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationImage ProcessingIot ArchitectureFilteringHardware-based FilteringImage Processing UnitsRandom-access MemoryReconfigurable Image Processing SystemsSystem Architecture DesignUart Communication
Multifunction image processing systems are typically deployed at the application site, but with the advent of Internet of Things(IoT) the design of such systems that are accessible remotely by applications over the internet is the need of the hour. These systems, being designed for data heavy applications need to possess a novel architecture design for image filtering and processing. This paper presents a multifunction image processing system that is accessible over the internet and is prototyped using a System on Chip (SoC) and FPGA interface. A pipelined based approach, inspired by a shift register based Random Access Memory design has been implemented for on-the-fly computation and minimal use of on-chip resources. The realization of the system was done using a low cost Spartan 6 FPGA and a Raspberry-pi B+ representing the ARM cortex based SoC. Data transfer between the FPGA and SoC has been achieved using a UART protocol. Computation time of different frame sizes for the system and standard I.P. software tools have been documented. Chip utilization and delays have also been reported.
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Engineering, Computer Engineering, Electrical Engineering +10