Design, analysis and comparison of multilevel topologies for DSTATCOM applications

Abstract

The aim of this paper is to present a design method of two different DSTATCOM multilevel topologies which are suitable to be used connected to the distribution grid. These devices have been classically commutated at fundamental line-frequencies, but the evolution of power semiconductors has allowed to increase switching frequencies and the power ratings of these devices, permitting the use of PWM modulation techniques. This paper mainly focuses the design issues of the NPC and cascaded H-bridge multilevel topologies for DSTATCOM applications, presenting a method for the dimensioning of the different elements that compose the device, paying special attention to the DC bus capacitor sizing and output filter inductance sizing