The MasPar MP-1 architecture

Abstract

The MasPar MP-1 architecture is described. It is a massively parallel SIMD machine with the following key characteristics: scalable architecture in terms of the number of processing elements, system memory, and system communication bandwidth; reduced-instruction-set-computer-like instruction set design which leverages optimizing compiler technology; adherence to industry-standard floating point formats, specifically VAX and IEEE floating point; and an architectural design amenable to a VLSI implementation. The architecture provides not only high computational capability, but also a mesh and global interconnect style of communication. The computational model and subsystems of the MP-1, including the interconnection mechanisms, are described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>