2016 · 21 citations · 1 references
EngineeringComputer ScienceElectrical EngineeringAnalog ElectronicsComputer VisionMachine LearningAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignPattern RecognitionAnalog-to-digital ConversionAnalog-to-digital Converter DesignClassification AccuracyClassification Accuracy AnalysisCore Area DesignationDigital Signal Processing Block ArchitectureQuantizationQuantization Noise
A 16-channel machine learning digitizing interface embeds Inner-Product calculation within a Delta-Sigma Modulator (IPDSM) array canceling quantization noise and noise shaping the multiplicand. The prototype, with 16 independent IPDSM channels occupies a core area of 0.95mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> in 65 nm CMOS. Each channel performs up to 100M multiplications/s. The system is demonstrated with a standard machine learning scheme for image recognition. It achieves the same classification accuracy for the MNIST set of hand-written digits as with the same algorithm on floating point DSP.
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