A new topology of embedded Z-source inverter with low voltage stress on capacitors

Abstract

In this paper, a new structure is proposed for embedded Z-source inverters (ZSIs). In the proposed structure, to reduce the capacitor voltage stress, instead of using one dc voltage source with high magnitude, three dc voltage sources with low magnitude are used. In this topology, two dc voltage sources with low magnitude are used in the Z-source network and one dc voltage source with low magnitude is used between the inverter and Z-source network. The required dc voltage sources can be provided by renewable energy sources such as solar panels. Moreover, for the proposed topology, the pulse width modulation (PWM) technique with minimum inductor current ripple is applied. To show the correctness operation the proposed embedded ZSI, the simulation results by using PSCAD/EMTDC software are used.