Publication | Closed Access
Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities
188
Citations
109
References
2016
Year
Unknown Venue
Gpu ArchitecturesGpu ArchitectureEngineeringLogic LayerGpu ClusterMany-core ArchitectureComputer EngineeringComputer ArchitectureMemoryPowerful Gpu CoresParallel ProgrammingComputer ScienceParallel ComputingManycore ProcessorMemory ArchitectureGpu Computing3D-stacked Dram
Processing data in or near memory (PIM), as opposed to in conventional computational units in a processor, can greatly alleviate the performance and energy penalties of data transfers from/to main memory. Graphics Processing Unit (GPU) architectures and applications, where main memory bandwidth is a critical bottleneck, can benefit from the use of PIM. To this end, an application should be properly partitioned and scheduled to execute on either the main, powerful GPU cores that are far away from memory or the auxiliary, simple GPU cores that are close to memory (e.g., in the logic layer of 3D-stacked DRAM).
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