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A 65 nm CMOS Wideband Radio Receiver With <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma $</tex-math> </inline-formula>-Based A/D-Converting Channel-Select Filters
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Citations
23
References
2016
Year
Wireless CommunicationsQuadrature Passive MixerNm Cmos ReceiverEngineeringRadio EngineeringRadio FrequencyAnalog-to-digital ConverterMixed-signal Integrated CircuitAnalog DesignReceiver Noise FigureComputer EngineeringA/d-converting Channel-select FiltersTex-math Notation=Signal ProcessingRf Subsystem
This paper presents a wideband quadrature radio receiver employing ΔΣ-based A/D-converting channel-select filters (ADCSFs). The output of the quadrature passive mixer is directly connected to the input of the ADCSFs, where a first-order ΔΣ modulator is incorporated into a fourth-order Butterworth channel-select filter (CSF) to provide sufficient dynamic range for a cellular system. A design methodology for the ADCSF is derived, where the transfer function of the CSF is preserved. The 65 nm CMOS receiver has a frequency range of 0.6-3.0 GHz and can be programmed to support the 2xLTE20, LTE20, and LTE10 bandwidths. The receiver noise figure varies from 2.3 to 3.9 dB, with a current consumption in 2xLTE20 mode between 33 mA at 0.6 GHz and 44 mA at 3.0 GHz from a 1.2 V supply, including 10-21 mA for LO phase generation and distribution. The SNDR is 47-51 dB at an LO frequency of 1.8 GHz.
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