Carbon Nanotube Interconnects − A Promising Solution for VLSI Circuits

Abstract

In nanoscale regime, the performance of traditional copper interconnects degrades substantially in terms of latency, power dissipation and induced crosstalk noise. This is due to miniaturization of electronic devices and many-fold enhancement of interconnect lengths in very large-scale integrated (VLSI) circuits. However, carbon nanotubes (CNTs) due to their unique physical properties such as high thermal conductivity, current carrying capability and mechanical strength have drawn the attention of researchers in recent times. The present paper provides comprehensive investigations in the various CNT structures for on-chip VLSI interconnect applications. Different configurations of CNT structures are studied namely single-wall CNT (SWCNT), multiwall CNT (MWCNT) and mixed-wall CNT bundle (MCB). The performance of CNT interconnects is analyzed using driver-interconnect-load system. It is investigated that the reduction in propagation delay in MCB interconnect is nearly 69%, 60%, 40% and 22% as compared to copper, SWCNT bundle, MWCNT and MWCNT bundle interconnect structures, respectively. This analysis considers an interconnect length variation from 500 to 2500 µm for 32-nm technology node. For the same dimensions the overall reduction in power dissipation in MCB interconnect is nearly 60%, 49%, 45% and 36% as compared to copper, SWCNT, MWCNT and MWCNT bundle interconnects, respectively. Furthermore, the effect of crosstalk on the interconnect structures has been examined. It is investigated that MCB has least crosstalk induced delay than all the other interconnect structures. Consequently, it is envisaged that MCB outperforms copper, SWCNT, MWCNT and MWCNT bundle interconnects and are best suited for future VLSI interconnects.