A 60-GHz 19.8-mW Current-Reuse Active Phase Shifter With Tunable Current-Splitting Technique in 90-nm CMOS

Abstract

A 60-GHz 4-bit vector-summing phase shifter has been implemented in a 90-nm CMOS process. Based on a tunable current-splitting technique with π-type low-pass filter (LPF) and T-type high-pass filter (HPF), a quadrature adjustable amplitude generator is developed to improve the insertion loss and adjust quadrature signals' amplitudes. Variable gain amplifiers (VGAs) that are widely used in traditional phase shifters are replaced by the generator to reduce power consumption. In addition, a balun-based current-reuse technique is applied to further save dc power. The overall consumed direct current is 11 mA under 1.8-V voltage supply. The measured results show that the phase shifter with an output balun (with loss of 1.6 dB) achieves gain of -0.4~2.5 dB at 60 GHz and root mean square (rms) gain error is 0.75~1.6 dB in the frequency regime from 57 to 64 GHz. The peak average gain is 1.1 dB at 59.7 GHz. By employing a calibration method, the measured rms phase error ranges from 2.3° to 7.6° from 57 to 64 GHz. The tested 60-GHz input 1-dB compression point (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> ) and noise figure (NF) for 16 phase states are -9.8 ± 0.8 dBm and 11 ± 1.3 dB, respectively.