Sub 0.1 μm Asymmetric Γ-gate PHEMT Process Using Electron Beam Lithography - Concepedia

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Sub 0.1 μm Asymmetric Γ-gate PHEMT Process Using Electron Beam Lithography

10

Citations

4

References

2002

Year

Woo‐Suk Sul, Dong-Hoon Shin, J. K. Rhee

MRS Proceedings

Semiconductor TechnologyElectrical EngineeringEngineeringElectron-beam LithographyNanoelectronicsApplied PhysicsSemiconductor Device FabricationSub 0.1MicroelectronicsSemiconductor Device

References

	Year	Citations

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