A Digital Phase Leading Filter Current Compensation (PLFCC) Technique for CCM Boost PFC Converter to Improve PF in High Line Voltage and Light Load Conditions

Abstract

This paper proposes a digital phase leading filter current compensation (PLFCC) technique for a continuous conduction mode boost power factor correction to improve PF in high line voltage and light load conditions. The proposed technique provides a corrected average inductor current reference and utilizes an enhanced duty ratio feed-forward technique which can cancel the adverse effect of the phase leading currents caused by filter capacitors. Moreover, the proposed PLFCC technique also provides the switching dead-zone in nature so the switching loss can be reduced. Therefore, the proposed PLFCC can significantly improve power quality and can achieve a high efficiency in high line voltage and light load conditions. The principle and analysis of the proposed PLFCC are presented, and performance and feasibility are verified by experimental results from the universal input (90-260 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AC</sub> ) and 750 W-400 V output laboratory prototype.