Publication | Closed Access
Compute unified device architecture (CUDA) based finite-difference time-domain (FDTD) implementation
39
Citations
15
References
2010
Year
Unknown Venue
EngineeringVlsi DesignGpu BenchmarkingFinite-difference Time-domainComputer ArchitectureComputer-aided DesignGraphics CardsGpu ComputingHardware SecuritySystems EngineeringFdtd SimulationsModeling And SimulationParallel ComputingComputational GeometryElectrical EngineeringProgram Graphics CardsComputer EngineeringComputer ScienceGpu ClusterFpga DesignGpu ArchitectureHardware AccelerationCircuit DesignVlsi ArchitectureParallel ProgrammingDigital Circuit Design
Recent developments in the design of graphics processing units (GPUs) have made it possible to use these devices as alternatives to central processor units (CPUs) and perform high performance scientific computing on them. Though several implementations of finite- difference time-domain (FDTD) method have been reported, the unavailability of high level languages to program graphics cards had been a major obstacle for scientists and engineers who would want to develop codes for graphics cards. Relatively recently, compute unified device architecture (CUDA) development environment has been introduced by NVIDIA and made GPU computing much easier. This paper presents an implementation of FDTD method based on CUDA. Two thread-to-cell mapping algorithms are presented. The details of the implementation are provided and strategies to improve the performance of the FDTD simulations are discussed.
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